ADL5725ACPZN-R7 datasheet(10/13 Pages) AD

10 / 13 page

Data Sheet

ADL5725

Rev. 0 | Page 9 of 12

APPLICATIONS INFORMATION

LAYOUT

Solder the exposed pad on the underside of the ADL5725 to a

low thermal and electrical impedance ground plane. This pad is

typically soldered to an exposed opening in the solder mask on

the evaluation board. Connect the ground vias to all other

ground layers on the evaluation board to maximize heat

dissipation from the device package.

Figure 13. Evaluation Board Layout for the ADL5725 Package

DIFFERENTIAL vs. SINGLE-ENDED OUTPUT

This section provides the test results that compare the ADL5725

using a differential vs. single-ended output. When using the

device as a single-ended output, use the RFOP output of the

evaluation board and terminate RFON to 50 Ω. Note that the

converse can be done as well; however, doing so produces

slightly different results from the plots shown in this section

because there is some amplitude imbalance between the two

differential ports, RFOP and RFON. The output trace and

connector loss were not deembedded for these measurements.

17.7 17.9 18.1 18.3 18.5 18.7 18.9 19.1 19.3 19.5 19.7

FREQUENCY (GHz)

Figure 14. Gain vs. Frequency

17.7 17.9 18.1 18.3 18.5 18.7 18.9 19.1 19.3 19.5 19.7

FREQUENCY (GHz)

Figure 15. Noise Figure vs. Frequency

–25

–20

–15

–10

–5

17.7 17.9 18.1 18.3 18.5 18.7 18.9 19.1 19.3 19.5 19.7

FREQUENCY (GHz)

Figure 16. Input IP3 vs. Frequency

–25

–20

–15

–10

–5

17.7 17.9 18.1 18.3 18.5 18.7 18.9 19.1 19.3 19.5 19.7

FREQUENCY (GHz)

Figure 17. Input P1dB vs. Frequency

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