ADS5102

ADS5103

SLAS351B – OCTOBER 2001 – REVISED DECEMBER 2001

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DEFINITION OF SPECIFICATIONS

Analog Input Bandwidth—The analog input frequency at which the spectral power of the fundamental

frequency (as determined by the FFT analysis) is reduced by 3 dB.

Aperture Delay—The delay between the 50% point of the rising edge of the clock and the instant at which the

analog input is sampled.

Aperture Uncertainity (Jitter)—The sample-to-sample variation in aperture delay.

Differential Nonlinearity (DNL)—The maximum deviation of any single LSB transition at the digital output from

an ideal 1 LSB step at the analog input. Ideally, each transition step is 1 LSB wide. DNL is the measured error

from theoretical in step size. A DNL of less than –1 LSB implies no missing codes.

Integral Nonlinearity (INL)—is the summation of the differential nonlinearity errors and indicates the worst

case deviation from an best fit straight line that is drawn from 1/2 LSB of the first transition to 1/2 LSB above

the last transition. The best fit is determined using the least squares curve fitting method.

Duty Cycle—is the ratio of the clock time high over the full clock period (time high plus time low) and then also

the time low over the total clock period. At a given clock rate, these specs define the acceptable duty cycle

allowed on the clock.

Sampling Rate (Fs)—The rate at which the converter tested to ensure conversion of analog signals to digital.

The maximum rate specified is the rate and which the device is production tested to ensure performance specs

are met. Expressed in mega samples per second (MSPS).

Output Propagation Delay—The delay between the 50% point of the falling edge of clock signal and the time

when all output data bits are within valid logic levels.

Offset Error—In an ideal ADC the first transition from 0000000000 should occur at 1/2 LSB above REFB. Offset

Error is defined as the difference between this ideal first transition and the voltage level where the first transition

actually occurs. Expressed in % full scale range (%FSR) but may also be expressed in volts. This can be thought

of as shifting the transfer function either left or right along the X-axis.

Overvoltage Recovery Time—The amount of time required for the converter to recover to 0.2% accuracy after

an analog input signal 150% of full scale is reduced to midscale.

Power Supply Rejection Ratio—The ratio of a change in input offset voltage to a change in power supply

voltage.

Total Harmonic Distortion (THD)—The ratio of the peak signal amplitude to the summation of the harmonic

components. This is expressed in – dB. THD = 20 Log [input amplitude/(summation of harmonic bins)]. For

calculation purposes, the first 7 harmonics are included in the calculations.

Signal To Noise Distortion (SINAD)—The ratio of the rms signal amplitude (set 1 dB below full scale) to rms

value of the sum of all other spectral noise and harmonic components, but excluding dc.

Signal to Noise Ratio (SNR)—The ratio of the rms signal amplitude (set at 1 dB below full scale) to the rms

value of the the sum of all other spectral components, excluding the first five harmonics and dc. Reported in

dB.

Spurious Free Dynamic Range (SFDR)—The difference between the peak amplitude of a fundamental input

sine wave and the largest peak spurious component that appears, excluding dc and the input. The peak

spurious component may or may not be a harmonic frequency. May be reported in dBc (i.e., degrades as signal

levels is lowered), or in dBFS (always related back to converter full scale).