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CS86 Fiches technique(PDF) 3 Page - fujitsu semiconductor |
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CS86 Fiches technique(HTML) 3 Page - fujitsu semiconductor |
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3 / 16 page ![]() CS86 Series 3 s MACRO LIBRARY (Including macros being prepared) 1. Logic cells 2. IP macro • Adder • AND-OR • AND-OR Inverter • Decoder • Clock Buffer • NON-Scan Flip Flop • Latch • Inverter • NAND • Buffer • AND • OR-AND Inverter • NOR • OR • OR-AND • Delay Buffer • Scan Flip Flop • Selector • ENOR • EOR • Boundary Scan Register • Dummy Clock Buffer • Bus Driver • Others CPU FR-V, ARM9, and others. DSP Communications DSP, DSP for Digital AV, and others. Peripheral Macro Interval timer, Interruption controller, DMA controller, RTC, Calender, UART, and others. Interface macro PCI, IEEE1394, USB 2.0, IrDA, and others. Multimedia processing macros JPEG, MPEG 4.0, and others. Mixed signal macros ADC, DAC, OPAMP, and others. Compiled macros RAM (1 port, 2 port) , ROM, Delay Line, Register file, and others. PLL Analog PLL I/O macro Compatible with various interface levels between 1.1 V and 5 V; SSTL2, PCI, P-CML, T-LVTTL, USB, IEEE1394, and others. |
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