STM32F412RG datasheet(129/193 Pages) STMICROELECTRONICS

No de pièce	STM32F412RG

Description	ARM-Cortex-M4 32b MCUFPU, 125 DMIPS, 1MB Flash, 256KB RAM, USB OTG FS, 17 TIMs, 1 ADC, 17 comm. interfaces

PDF	193 Pages

Scroll/Zoom	100%

Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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129 / 193 page

DocID028087 Rev 4

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STM32F412xE/G

Electrical characteristics

161

Figure 40. SPI timing diagram - slave mode and CPHA = 0

ta(SO)

Data output access time Slave mode

tdis(SO)

Data output disable time Slave mode

tv(SO)

Data output valid time

Slave mode (after enable edge),

2.7 V < VDD < 3.6 V

-7.5

Slave mode (after enable edge),

1.7 V < VDD < 3.6 V

-7.5

th(SO)

Data output hold time

Slave mode (after enable edge),

1.7 V < VDD < 3.6 V

5.5

tv(MO)

Data output valid time

Master mode (after enable edge)

th(MO)

Data output hold time

Master mode (after enable edge)

1. Guaranteed by characterization, not tested in production.

2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit

into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI

communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%

Table 64. SPI dynamic characteristics(1) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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