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ADP7158ACPZ-1.2-R7 Fiches technique(PDF) 20 Page - Analog Devices

No de pièce ADP7158ACPZ-1.2-R7
Description  High PSRR, RF Linear Regulator
PDF  23 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADP7158ACPZ-1.2-R7 Fiches technique(HTML) 20 Page - Analog Devices

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Data Sheet
ADP7158
Rev. A | Page 19 of 22
0
20
40
60
80
100
120
140
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAX
Figure 57. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 25°C
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
TOTAL POWER DISSIPATION (W)
40
50
60
70
80
90
100
110
120
130
6400mm2
500mm2
25mm2
TJ MAX
Figure 58. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 50°C
0
0.10.20.30.40.50.60.7
0.9
0.8
1.0
TOTAL POWER DISSIPATION (W)
80
85
90
95
100
105
110
115
120
125
130
6400mm2
500mm2
25mm2
TJ MAX
Figure 59. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 85°C
Thermal Characterization Parameter (ΨJB)
When the evaluation board temperature is known, use the
thermal characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 60 and Figure 61). Calculate the
maximum junction temperature (TJ) from the evaluation board
temperature (TB) and power dissipation (PD) using the following
formula:
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 29.1°C/W for the 10-lead LFCSP
package and 30.1°C/W for the 8-lead SOIC package.
0
20
40
60
80
100
120
140
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TOTAL POWER DISSIPATION (W)
TB =25°C
TB =50°C
TB =65°C
TB =85°C
TJ MAX
Figure 60. Junction Temperature vs. Total Power Dissipation for
the 10-Lead LFCSP
0
20
40
60
80
100
120
140
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
TOTAL POWER DISSIPATION (W)
TB =25°C
TB =50°C
TB =65°C
TB =85°C
TJ MAX
Figure 61. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC



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