M45PE80 datasheet(5/36 Pages) STMICROELECTRONICS

5 / 36 page

5/36

M45PE80

SUMMARY DESCRIPTION

The M45PE80 is a 8Mbit (1M x 8 bit) Serial Paged

Flash Memory accessed by a high speed SPI-

compatible bus.

The memory can be written or programmed 1 to

256 bytes at a time, using the Page Write or Page

Program instruction. The Page Write instruction

consists of an integrated Page Erase cycle fol-

lowed by a Page Program cycle.

The memory is organized as 16 sectors, each con-

taining 256 pages. Each page is 256 bytes wide.

Thus, the whole memory can be viewed as con-

sisting of 4096 pages, or 1,048,576 bytes.

The memory can be erased a page at a time, using

the Page Erase instruction, or a sector at a time,

using the Sector Erase instruction.

Figure 2. Logic Diagram

Table 1. Signal Names

Figure 3. VDFPN Connections

Note: 1. There is an exposed die paddle on the underside of the

MLP8 package. This is pulled, internally, to VSS, and

must not be allowed to be connected to any other voltage

or signal line on the PCB.

2. See PACKAGE MECHANICAL section for package di-

mensions, and how to identify pin-1.

Figure 4. SO Connections

Note: 1. DU = Don’t Use

2. See PACKAGE MECHANICAL section for package di-

mensions, and how to identify pin-1.

Serial Clock

Serial Data Input

Serial Data Output

Chip Select

Write Protect

Reset

VCC

Supply Voltage

VSS

Ground

Reset

AI06810B

VCC

M45PE80

VSS

AI06811B

VCC

VSS

Reset

M45PE80

AI09031B

VSS

M45PE80

RESET

VCC

M45PE80 Fiches technique(PDF) 5 Page - STMicroelectronics

M45PE80 Fiches technique(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Fiches technique Télécharger

Lien URL