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TNETV1002IDZHK Fiches technique(PDF) 86 Page - Texas Instruments

No de pièce TNETV1002IDZHK
Description  Fixed-Point Digital Signal Processor
PDF  102 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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TNETV1002IDZHK Fiches technique(HTML) 86 Page - Texas Instruments

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Electrical Specifications
76
June 2001 -- Revised December 2002
SPRS180C
6.13 I2C Bus Timings
Table 6--30 through Table 6--32 assume testing over recommended operating conditions (see Figure 6--30
through Figure 6--32).
Table 6--30. I2C Bus Device Switching Characteristics of the SDA and SCL Bus Lines
PARAMETER
STANDARD
MODE
FAST
MODE
UNIT
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tc(SCL)
Cycle time, SCL
10
2.5
μs
tw(SCLH)
Pulse duration, SCL high
4
0.6
μs
tw(SCLL)
Pulse duration, SCL low
4.7
1.3
μs
tr(SCL)
Rise time, SCL
1000
300
ns
tf(SCL)
Fall time, SCL
300
300
ns
tr(SDA)
Rise time, SDA
1000
300
ns
tf(SDA)
Fall time, SDA
300
300
ns
tw(SP)
Pulse duration, spike suppression
0
50
ns
tsu(SDA--SCLH)
Setup time, SCL high after SDA valid
250
100
ns
th(SDA--SCLL)
Hold time, SCL low after SDA invalid
0
3.45
0
0.9
μs
tc(SCL)
SCL
SDA
tsu(SDA--SCLH)
th(SDA--SCLL)
tw(SCLL)
tw(SCLH)
tr(SCL)
tf(SCL)
tf(SDA)
tr(SDA)
tw(SP)
Figure 6--30. Definition of Timing on the I2CBus



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