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TMS320C6472ECTZ Fiches technique(PDF) 24 Page - Texas Instruments |
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TMS320C6472ECTZ Fiches technique(HTML) 24 Page - Texas Instruments |
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24 / 269 page ![]() GPIO General-PurposeInput/Output0(GPIO)Port GP[3]/TSIP1_EN (D) GP[2]/TSIP0_EN (D) GP[1]/UTOPIA_EN (D) GP[15]/SYSCLKOUTEN (A) GP[14]/CFGGP4 (B) GP[13]/CFGGP3 (B) GP[11]/CFGGP1 (B) GP[10]/CFGGP0 (B) GP[9]/BOOTMODE3 (C) GP[8]/BOOTMODE2 (C) GP[7]/BOOTMODE1 (C) GP[6]/BOOTMODE0 (C) GP[5]/EMAC1_EN (D) GP[4]/TSIP2_EN (D) GP[0]/HPI_EN (D) Timers(64-Bit) Timers 0-5 Timers 6-11 RIOCLKP Clock RIOTXN[1:0] RapidIO Transmit Receive RIOCLKN 2 2 2 2 RIOTXP[1:0] RIORXP[1:0] RIORXN[1:0] GP[12]/CFGGP2 (B) TIMI1 TIMO2 TIMI0 WDOUT TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com A. The SYSCLKOUTEN pin is muxed with GP[15]. For more details, see Section 3. B. These CONFIG pins are muxed with the GPIO peripheral pins. For more details, see Section 3. C. These BOOTMODE pins are muxed with the GPIO peripheral pins. For more details, see Section 3. D. These pins are muxed with GPIO peripheral pins. For more details, see Section 3. Figure 2-7. Timers/GPIO/RapidIO Peripheral Signals 24 Device Overview Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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