CPC75282KA datasheet(8/19 Pages) IXYS

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PRELIMINARY

INTEGRATED CIRCUITS DIVISION

CPC75282

PRELIMINARY

R00E

1.7.4 Test Switches, SW5 and SW6

Parameter

Test Conditions

Symbol

Minimum

Typical

Maximum

Unit

Off-State

Leakage Current

VSW1 (differential) = TLINE to TBAT

VSW2 (differential) = RLINE to RBAT

All-Off state.

+25

C,

VSW (differential) = -320V to gnd

VSW (differential) = +260V to -60V

ISW

A

+85

 C,

VSW (differential) = -330V to gnd

VSW (differential) = +270V to -60V

-40

 C,

VSW (differential) = -310V to gnd

VSW (differential) = +250V to -60V

On Resistance

ISW(on) = ±10mA, ±40mA,

RBAT and TBAT = -2V

+25

C

RON



+85

C46

-40

C28

DC current limit

VSW (on) = ±10V, +25C

ISW

175

VSW (on) = ±10V, +85C

110

VSW (on) = ±10V, -40C

210

250

Dynamic current limit

(t = <0.5

s)

Break switches on, all other switches

off. Apply ±1kV 10x1000

s pulse with

appropriate protection in place.

ISW

-2.5

Logic Input to Switch

Output Isolation

+25

C, OFF

x = 0,

VSW (TLINE, RLINE) = ±320V

ISW

A

+85

C, OFF

x = 0,

VSW (TLINE, RLINE) = ±330V

-40

C, OFF

x = 0,

VSW (TLINE, RLINE) = ±310V

Transient Immunity 1

dV/dt

1500

2100

s

1 Applied voltage is 100V

P-P square wave at 100Hz.

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