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AS7C256A Fiches technique(PDF) 5 Page - Alliance Semiconductor Corporation

No de pièce AS7C256A
Description  5V 32K X 8 CMOS SRAM (Common I/O)
PDF  9 Pages
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Fabricant  ALSC [Alliance Semiconductor Corporation]
Site Internet  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS7C256A Fiches technique(HTML) 5 Page - Alliance Semiconductor Corporation

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AS7C256A
9/24/04; v.1.2
Alliance Semiconductor
P. 5 of 9
®
Write cycle (over the operating range)9
Write waveform 1 (WE controlled)9
Write waveform 2 (CE controlled)9
Parameter
Symbol
-10
-12
-15
-20
Unit Notes
Min
Max
Min
Max
Min
Max
Min
Max
Write cycle time
tWC
10–12–15–20–
ns
Chip enable to write end
tCW
8
–
8
–
10–12–
ns
Address setup to write end
tAW
8
–
8
–
10–12–
ns
Address setup time
tAS
0–
0–
0–
0–
ns
Write pulse width
tWP
7–
8–
9–
12
–
ns
Write recovery time
tWR
0–
0–
0–
0–
ns
Address hold from end of write
tAH
0–
0–
0–
0–
ns
Data valid to write end
tDW
5–
6–
8–
10
–
ns
Data hold time
tDH
0–
0–
0–
0–
ns
3,4
Write enable to output in high Z
tWZ
–5
–6
–7
–8
ns
3,4
Output active from write end
tOW
3–
3–
3–
3–
ns
3,4
tAW
tAH
tWC
Address
WE
Din
Dout
tDH
tOW
tDW
tWZ
tWP
tAS
Data valid
tWR
tAW
Address
CE
WE
Din
Data valid
tCW
tDW
tDH
tAH
tWC
tAS
tWR



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