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74LVC2G02DP Fiches technique(PDF) 13 Page - Panasonic Semiconductor |
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74LVC2G02DP Fiches technique(HTML) 13 Page - Panasonic Semiconductor |
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13 / 16 page ![]() 2004 Sep 15 13 Philips Semiconductors Product specification Dual 2-input NOR gate 74LVC2G02 UNIT A1 A max. A2 A3 bp L HE Lp wy v ce D(1) E(2) Z(1) θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 ° 0 ° 0.13 0.1 0.2 0.4 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 Q 0.21 0.19 SOT765-1 MO-187 02-06-07 w M bp D Z e 0.12 14 8 5 θ A2 A1 Q Lp (A3) detail X A L HE E c v M A X A y 2.5 5 mm 0 scale VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 1 pin 1 index |
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