Errata Document

S6E2DF Series

December 4, 2015

Document No. 002-05043 Rev. *A

4

Page

Item

Description

11

2. Features

Note should be added as indicated by the shading below.

(Error)

GDC Unit

Controller for external graphics display

Accelerator for 2D block image transfer (blit) operations

Embedded SRAM video memory

High-Speed Quad SPI (Serial Peripheral Interface for external memory extensions)

SDRAM interface for external memory extensions

HBI (Hyper Bus Interface) interface for external memory extensions

Maximum core system clock frequency : 160 MHz

(Correct)

GDC Unit

Controller for external graphics display

Accelerator for 2D block image transfer (blit) operations

Embedded SRAM video memory

High-Speed Quad SPI (Serial Peripheral Interface for external memory extensions)

SDRAM interface for external memory extensions

HBI (Hyper Bus Interface) interface for external memory extensions

Maximum core system clock frequency : 160 MHz

Note:

−

User can leverage the internal VRAM and external HyperRAM as a graphics memory

allowed to be written by GDC.

15

4. Packages

“Packages” should be corrected as indicated by the shading below.

(Error)

Product Name

Package

S6E2DF5G0A

S6E2DF5J0A

S6E2DF5GJA

LQFP: FPT-120P-M21 (0.5 mm pitch)



-



LQFP: FPT-176P-M07 (0.5 mm pitch)

-



-

PFBGA: FDJ161 (0.5 mm pitch)



-

-

Ex_LQFP(TEQFP): LEM120 (0.5 mm pitch)



: Supported

(Correct)

Product Name

Package

S6E2DF5G0A

S6E2DF5J0A

S6E2DF5GJA

LQFP: FPT-120P-M21 (0.5 mm pitch)



-



LQFP: FPT-176P-M07 (0.5 mm pitch)

-



-

FBGA: FDJ161 (0.5 mm pitch)



-

-

Ex_LQFP(TEQFP): LEM120 (0.5 mm pitch)



-

-