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AD1836AS Fiches technique(PDF) 4 Page - Analog Devices

No de pièce AD1836AS
Description  Multichannel 96 kHz Codec
PDF  18 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD1836AS Fiches technique(HTML) 4 Page - Analog Devices

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PRELIMINARY TECHNICAL DATA
REV. PrC
–4–
AD1836–SPECIFICATIONS
TIMING (continued)
Parameter
Min
Max
Unit
Comments
ADC Serial Port
Normal Modes
tABH
ABCLK Delay High
max
ns
From MCLK Rising
256
× f
S
512
× fS
768
× fS
tABL
ABCLK Delay Low
max
ns
From MCLK Rising
256
× fS
512
× fS
768
× f
S
tALS
LRCLK Delay
max
ns
From ABCLK Falling
tABDD
ASDATA Delay
max
ns
From ABCLK Falling
tALRDD
ASDATA Delay
max
ns
From ALRCLK Changing
(Left-Justified)
Packed 128, 256 Modes
tABH
ABCLK Delay High
max
ns
From MCLK Rising
256
× fS
512
× fS
768
× f
S
tABL
ABCLK Delay Low
max
ns
From MCLK Rising
256
× fS
512
× f
S
768
× fS
tALS
LRCLK Delay
max
ns
From ABCLK Falling
tABDD
ASDATA Delay
max
ns
From ABCLK Falling
tALRDD
ASDATA Delay
max
ns
From ALRCLK Changing
(Left-Justified)
TDM PACKED AUX, MASTER MODE
tABH
ABCLK Delay High
max
ns
From MCLK Rising
256
× fS
512
× fS
768
× f
S
tABL
ABCLK Delay Low
max
ns
From MCLK Rising
256
× fS
512
× f
S
768
× fS
tXBH
AUXBCLK Delay High
max
ns
From MCLK Rising
256
× f
S
512
× fS
768
× fS
tXBL
AUXBCLK Delay Low
max
ns
From MCLK Rising
256
× fS
512
× fS
768
× f
S
tALS
LRCLK Delay
max
ns
From ABCLK Falling
tXLS
AUXLRCLK Delay
max
ns
From ABCLK Falling
tABDD
ASDATA Delay
max
ns
From ABCLK Falling
tALRDD
ASDATA Delay
max
ns
From ALRCLK Changing
(Left-Justified)
tDDS
AAUXDATA Setup
min
ns
To AUXBCLK Rising
tDDH
AAUXDATA Hold
min
ns
From AUXBCLK Rising
tDDS
DSDATA Setup
min
ns
To DBCLK Rising
tDDH
DSDATA Hold
min
ns
From DBCLK Rising
tDXDD
DAUXDATA Delay
max
ns
From AUXBCLK Falling
tDXDD
DAUXDATA Delay
max
ns
From AUXLRCLK Changing
(Left-Justified)



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