LP38853_15 datasheet(17/30 Pages) TI1

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LP38853

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SNVS335E – DECEMBER 2006 – REVISED NOVEMBER 2015

Figure 24. FZERO and FPOLE vs Gain

8.2.2.2 Power Dissipation and Heat Sinking

Additional copper area for heat sinking may be required, depending on the maximum device dissipation (PD) and

the maximum anticipated ambient temperature (TA) for the device. Under all possible conditions, the junction

temperature must be within the range specified under operating conditions.

The total power dissipation of the device is the sum of three different points of dissipation in the device.

The first part is the power that is dissipated in the NMOS pass element and can be determined with Equation 8:

PD(PASS) = (VIN – VOUT) × IOUT

(8)

The second part is the power that is dissipated in the bias and control circuitry and can be determined with

Equation 9:

PD(BIAS) = VBIAS × IGND(BIAS)

where

•

IGND(BIAS) is the portion of the operating ground current of the device that is related to VBIAS.

(9)

The third part is the power that is dissipated in portions of the output stage circuitry and can be determined with

Equation 10:

PD(IN) = VIN × IGND(IN)

where

•

IGND(IN) is the portion of the operating ground current of the device that is related to VIN.

(10)

The total power dissipation is shown by Equation 11:

PD = PD(PASS) + PD(BIAS) + PD(IN)

(11)

The maximum allowable junction temperature rise (

ΔTJ) depends on the maximum anticipated ambient

temperature (TA(MAX)) for the application, and the maximum allowable operating junction temperature

(TJ(MAX))(see Equation 12):

ΔTJ = TJ(MAX) – TA(MAX)

(12)

The maximum allowable value for junction-to-ambient thermal resistance, RθJA, can be calculated using

Equation 13:

(13)

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