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SWCS049J Fiches technique(PDF) 17 Page - Texas Instruments |
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SWCS049J Fiches technique(HTML) 17 Page - Texas Instruments |
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17 / 119 page ![]() 17 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Specifications Copyright © 2010–2016, Texas Instruments Incorporated 5.9 Power Consumption over operating free-air temperature range (unless otherwise noted) All current consumption measurements are relative to the FULL chip, all VCC inputs set to VBAT voltage, COMP2 is off. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Device BACKUP state CK32K clock and RTC digital running (RTC_PWDN = 0) VBAT = 2.4 V, VBACKUP = 0 V, 13 18 µA VBAT = 0 V, VBACKUP = 3.2 V, V5IN = 0 V 7 10 Device OFF state CK32K clock running, V5IN = 0 VBAT = 3.8 V 13 18 µA VBAT = 5 V 17 23 VBAT = 3.8 V, RTC digital running (RTC_PWDN = 0) 16 22 VBAT = 3.8 V, digital running (RTC_PWDN = 0), backup battery charger on, VBACKUP = 3.2 V 26 32 Device SLEEP state VBAT = 3.8 V, CK32K clock running: 3 DCDCs on, 5 LDOs and VRTC on, no load 292 µA 3 DCDCs on, 3 LDOs and VRTC on, no load 279 VBAT = 3.8 V, CK32K clock and RTC digital running (RTC_PWDN = 0): 3 DCDCs on, 5 LDOs and VRTC on, no load 295 Additional current from V5IN = 5 V, if VDDCtrl is on, no load 320 500 Device ACTIVE state VBAT = 3.8 V, CK32K clock running: 3 DCDCs on, 5 LDOs and VRTC on, no load 1.2 mA 3 DCDCs on, 3 LDOs and VRTC on, no load 1.05 3 DCDCs on PWM mode (VDD1_PSKIP = VDD2_PSKIP = VIO_PSKIP = 0), 5 LDOs and VRTC on, no load 23.6 Additional current from V5IN = 5 V, if VDDCtrl is on, no load 0.32 0.5 |
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