MSP430F6433IPZ datasheet(6/119 Pages) TI1

6 / 119 page

MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433

SLAS720D – AUGUST 2010 – REVISED DECEMBER 2015

www.ti.com

Device Comparison

Table 3-1 summarizes the available family members.

Table 3-1. Family Members(1)(2)

USCI

CHANNEL

FLASH

SRAM

ADC12_A

DAC12_A

Comp_B

DEVICE

Timer_A(3) Timer_B(4)

USB

I/O

PACKAGE

(KB)

(Ch)

UART,

SPI, I2C

IrDA, SPI

12 ext,

100 PZ,

MSP430F6438

256

5, 3, 3

4 int

113 ZQW

12 ext,

100 PZ,

MSP430F6436

128

5, 3, 3

4 int

113 ZQW

12 ext,

100 PZ,

MSP430F6435

256

5, 3, 3

4 int

113 ZQW

12 ext,

100 PZ,

MSP430F6433

128

5, 3, 3

4 int

113 ZQW

(1)

For the most current package and ordering information, see the Package Option Addendum in Section 8, or see the TI website at

www.ti.com.

(2)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/packaging.

(3)

Each number in the sequence represents an instantiation of Timer_A with its associated number of capture/compare registers and PWM

output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first

instantiation having 3 and the second instantiation having 5 capture/compare registers and PWM output generators, respectively.

(4)

Each number in the sequence represents an instantiation of Timer_B with its associated number of capture/compare registers and PWM

output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first

instantiation having 3 and the second instantiation having 5 capture/compare registers and PWM output generators, respectively.

Device Comparison

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Product Folder Links: MSP430F6438 MSP430F6436 MSP430F6435 MSP430F6433

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