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M24C08-DRMF3TP Fiches technique(PDF) 13 Page - STMicroelectronics |
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M24C08-DRMF3TP Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 39 page ![]() DocID025850 Rev 5 13/39 M24C08-A125 Device operation 38 Note: A: significant address bit. X: bit is Don’t Care. Table 3. Significant address bits Memory (Device type identifier = 1010b) Identification page (Device type identifier = 1011b) Random Address Read Write Read Identification page Write Identification page Lock Identification page Read lock status b2(1) A9 A9 X X X see Section 4.2.5 b1(1) A8 A8 X X X b7 A7 A7 0 0 1 b6 A6 A6 X X X b5 A5 A5 X X X b4 A4 A4 X X X b3 A3 A3 A3 A3 X b2 A2 A2 A2 A2 X b1 A1 A1 A1 A1 X b0 A0 A0 A0 A0 X 1. Address bits defined inside the DeviceSelect code (see Table 2) |
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