AP7342 datasheet(9/14 Pages) DIODES

9 / 14 page

AP7342

Document number: DS37614 Rev. 2 - 2

9 of 14

www.diodes.com

March 2015

AP7342

Typical Characteristics (cont.)

Turn Off Waveform of Output Discharge versions (VIN=VOUT+1V, CIN=COUT1=COUT2=0.47µF, TA = +25°C)

Application Information

Output Capacitor

An output capacitor (COUT) is needed to improve transient response and maintain stability. The AP7342 is stable with very small ceramic output

capacitors. The ESR (Equivalent Series Resistance) and capacitance drives the selection. If the application has large load variations, it is

recommended to utilize low-ESR bulk capacitors. It is recommended to place ceramic capacitors as close as possible to the load and the GND pin

and care should be taken to reduce the impedance in the layout.

Input Capacitor

To prevent the input voltage from dropping during load steps, it is recommended to utilize an input capacitor (CIN). A minimum 0.47µF ceramic

capacitor is recommended between VIN and GND pin to decouple input power supply glitch. This input capacitor must be located as close as

possible to the device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for both VIN and GND pin.

Enable Control

The AP7342 is turned on by setting the EN pins high, and is turned off by pulling it low. If this feature is not used, the EN pins should be tied to VIN

pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pins must be able to swing above

and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section.

Short Circuit Protection

When VOUT pins are short-circuit to GND, short circuit protection will be triggered and clamp the output current to approximately 60mA. This feature

protects the regulator from overcurrent and damage due to overheating.

Layout Considerations

For good ground loop and stability, the input and output capacitors should be located close to the input, output, and GND pin of the device. The

regulator GND pin should be connected to the external circuit ground to reduce voltage drop caused by trace impedance. Ground plane is generally

used to reduce trace impedance. Wide trace should be used for large current paths from VIN to VOUT and load circuit.

2.8V

Time t (µs)

Output Voltage

CE Input Voltage

120

160

200

IOUT=0mA

IOUT=30mA

IOUT=150mA

1.8V

Time t (µs)

Output Voltage

CE Input Voltage

120

160

200

IOUT=0mA

IOUT=30mA

IOUT=150mA

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