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P3P623S00B Fiches technique(PDF) 4 Page - ON Semiconductor |
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P3P623S00B Fiches technique(HTML) 4 Page - ON Semiconductor |
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4 / 9 page ![]() P3P623S00B, P3P623S00E www.onsemi.com 4 Table 5. OPERATING CONDITIONS Parameter Description Min Max Unit VDD Operating Voltage 3.0 3.6 V TA Operating Temperature (Ambient Temperature) −40 +85 °C CL Load Capacitance 30 pF CIN Input Capacitance 7 pF Table 6. ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions Min Typ Max Units VIL Input Low Voltage (Note 5) 0.8 V VIH Input High Voltage (Note 5) 2.0 V IIL Input LOW Current VIN = 0 V 50 mA IIH Input HIGH Current VIN = VDD 100 mA VOL Output LOW Voltage (Note 6) IOL = 8 mA 0.4 V VOH Output HIGH Voltage (Note 6) IOH = −8 mA 2.4 V IDD Supply Current Unloaded outputs 27 mA ZO Output Impedance 23 W 5. CLKIN input has a threshold voltage of VDD/2 6. Parameter is guaranteed by design and characterization. Not 100% tested in production. Table 7. SWITCHING CHARACTERISTICS Parameter Test Conditions Min Typ Max Units Input Frequency 20 50 MHz Output Frequency 30 pF load 20 50 MHz Duty Cycle (Notes 7, 8) = (t2/ t1) x 100 Measured at VDD/2 40 50 60 % Output Rise Time (Notes 7, 8) Measured between 0.8 V and 2.0 V 2.5 nS Output Fall Time (Notes 7, 8) Measured between 2.0 V and 0.8 V 2.5 nS Output−to−Output Skew (Notes 7, 8) All outputs equally loaded with SSOFF 250 pS Delay, CLKIN Rising Edge to CLKOUT Rising Edge (Note 8) Measured at VDD/2 with SSOFF ±350 pS Device−to−Device Skew (Note 8) Measured at VDD/2 on the CLKOUT pins of the device 700 pS Cycle−to−Cycle Jitter (Notes 7, 8) Loaded outputs ±250 pS PLL Lock Time (Note 8) Stable power supply, valid clock presen- ted on CLKIN pin 1.0 mS 7. All parameters specified with 30 pF loaded outputs. 8. Parameter is guaranteed by design and characterization. Not 100% tested in production. |
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