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SM5843AS1 Fiches technique(PDF) 18 Page - Nippon Precision Circuits Inc |
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SM5843AS1 Fiches technique(HTML) 18 Page - Nippon Precision Circuits Inc |
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18 / 24 page ![]() SM5843A ×1 NIPPON PRECISION CIRCUITS—18 System Reset (RSTN) The SM5843A ×1 must be reset under the following conditions. s At power-ON. s When the LRCI clock and internal operation tim- ing need to be resynchronized. s When switching the CKSLN clock select input. s When switching between filter characteristics using TMOD2. s When either or both of the LRCI and XTI clocks stop or are interrupted. The system is reset by applying a LOW-level pulse on RSTN. The arithmetic and output timing counters are reset on the first LRCI start edge after reset is released, as long as the XTI clock has already stabilized. The LRCI start edge is determined by the state of INF1N and INF2N. When INF1N is LOW or when both INF1N and INF2N are HIGH, the start edge is the rising edge. When INF1N is HIGH and INF2N is LOW, the start edge is the falling edge. When RSTN is LOW, the DOL and DOR outputs are LOW, muting the output signal to an attenuation level of −∞. The power-ON reset pulse can be applied by a microcontroller or, for systems where XTI and LRCI are stable at power-ON, by connecting a capacitor of several hundred pF between RSTN and VSS. For systems that do not use a microcontroller, the capaci- tor must be chosen such that the XTI and LRCI clocks fully stabilize before RSTN goes from LOW to HIGH. Filter Characteristic Selection (TMOD2) There are 2 digital filter frequency response charac- teristics incorporated into the SM5843A ×1, selected by the state of TMOD2. A sharp roll-off characteris- tic (response 1) is selected when TMOD2 is HIGH, and a slow roll-off characteristic (response 2) when TMOD2 is LOW. The response is modified by changing the number of taps in the 1st FIR filter stage, as shown in figure 1. s Filter response 1 • 153-tap 1st FIR • 29-tap 2nd FIR • 17-tap 3rd FIR s Filter response 2 • 25-tap 1st FIR • 29-tap 2nd FIR • 17-tap 3rd FIR Note that the device should be reset when changing TMOD2 during normal operation. Dither Rounding-off Processing (TMOD1) Dither rounding-off processing of output data is ON when TMOD1 is LOW. Dither is OFF and normal processing mode is selected when TMOD1 is HIGH. Figure 6. System reset timing and output muting RSTN LRCI WCKO DOL DOR 1 2 Internal reset |
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