ACE9030MSLASHIWSLASHFP1N datasheet(4/39 Pages) MITEL

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ACE9030

Fig.4 Typical VDD local decoupling networks without series resistors

Fig.5 Typical VDD local decoupling networks with series resistors

ABSOLUTE MAXIMUM RATINGS

Supply voltage from ground

– 0·3 V to + 6·0 V

(any V

DD to any VSS)

Supply voltage difference

– 0·3 V to + 0·3 V

(any V

DD to any other VDD)

Input voltage

SS – 0·3 V to VDD + 0·3 V

(any input pin to its local V

SS and VDD)

Output voltage

SS – 0·3 V to VDD + 0·3 V

(any output pin to its local V

SS and VDD)

Storage temperature

– 55

°C to + 150 °C

Operating temperature

– 40

°C to + 85 °C

tions V

DDSUB and VDDSUB2 must be the most positive of all VDD’s

at all times including during power on and off ramping. As the

current taken through these V

DD’s is significantly less than

through the other V

DD’s this requirement can be easily met by

directly connecting all V

DD pins to a common point on the

circuit board but with the decoupling capacitors distributed to

minimise cross-talk caused by common mode currents. If low

value series resistors are to be included in the V

DD connec-

tions, with decoupling capacitors by the ACE9030 pins to

further reduce interference, the V

DDSUB and VDDSUB2 pins should

not have such a resistor in order to guarantee that their

voltage is not slowed down at power-on. Power switches to

DOUT0 and DOUT1 are supplied from V

DDX and are specified

for a total current of up to 40 mA so any resistor in the V

DDX

connection must be very low, around 1

Ω, in order to avoid

excessive voltage drop; it is recommended that this supply

has no series resistor. These two methods are shown in circuit

diagrams, figures 4 and 5. In both circuits the main V

DD must

also have good decoupling.

These are not the operating conditions, but are the

absolute limits which if exceeded even momentarily may

cause permanent damage. To ensure sustained correct op-

eration the device should be used within the limits given under

Electrical Characteristics.

To avoid any possibility of latch-up the substrate connec-

Main VDD

VDDSUB

VDDSUB2

VDDL

VDDA

VDDX

VDDD

VDDSA

VDDSUB

VDDSUB2

VDDL

VDDA

VDDX

VDDD

VDDSA

Main VDD

No Resistor

Very

Small

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