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ML6461CS Fiches technique(PDF) 8 Page - Micro Linear Corporation |
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ML6461CS Fiches technique(HTML) 8 Page - Micro Linear Corporation |
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8 / 30 page ![]() ML6461 8 Figure 1. Example of the Beginning of the Odd And Even Fields vs. HSYNC and VSYNC in Master Mode. (SLAVE/MASTER = 0, SENSE_HSYNC = 0, SENSE_VSYNC ===== 0) fields (1-2) and (3-4). The ML6461 also supports a frame based synchronization mode (B17 = FSYNC = 1) where a vertical reset pulse unconditionally resets the vertical line FUNCTIONAL DESCRIPTION (Continued) counter to line 4. For proper operation only one active edge should be sent per frame. The polarity is controlled by SENSE_VSYNC (B10). HSYNC Line 3 Line 4 Line 5 Line 6 HSYNC Line 265 Line 266 Line 267 Line 268 VSYNC VSYNC Beginning of an Odd Field Beginning of an Even Field Line 269 Coincident Active Edges |
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