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UPD75P0076 Fiches technique(PDF) 2 Page - NEC |
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UPD75P0076 Fiches technique(HTML) 2 Page - NEC |
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2 / 62 page ![]() µPD75P0076 2 Functional Outline Parameter Function Instruction execution time • 0.95, 1.91, 3.81, 15.3 µs (@ 4.19 MHz with main system clock) • 0.67, 1.33, 2.67, 10.7 µs (@ 6.0 MHz with main system clock) • 122 µs (@ 32.768 kHz with subsystem clock) On-chip memory PROM 16384 x 8 bits RAM 512 x 4 bits General-purpose register • 4-bit operation: 8 x 4 banks • 8-bit operation: 4 x 4 banks Input/ CMOS input 12 Connections of on-chip pull-up resistors can be specified by software: 7 output Also used for analog input pins: 4 port CMOS input/output 12 Connections of on-chip pull-up resistors can be specified by software: 12 Also used for analog input pins: 4 N-ch open-drain 8 13-V withstand voltage input/output pins Total 32 Timer 4 channels • 8-bit timer/event counter: 2 channels (can be used as the 16-bit timer/event counter) • 8-bit basic interval timer/watchdog timer: 1 channel • Watch timer: 1 channel Serial interface • 3-wire serial I/O mode ··· MSB or LSB can be selected for transferring first bit • 2-wire serial I/O mode A/D converter 8-bit resolution x 8 channels (1.8 V ≤ AVREF ≤ VDD) Bit sequential buffer 16 bits Clock output (PCL) • Φ, 1.05 MHz, 262 kHz, 65.5 kHz (@ 4.19 MHz with main system clock) • Φ, 1.5 MHz, 375 kHz, 93.8 kHz (@ 6.0 MHz with main system clock) Buzzer output (BUZ) • 2, 4, 32 kHz (@ 4.19 MHz with main system clock or @ 32.768 kHz with subsystem clock) • 2.93, 5.86, 46.9 kHz (@ 6.0 MHz with main system clock) Vectored interrupts External: 3, Internal: 4 Test input External: 1, Internal: 1 System clock oscillator • Ceramic or crystal oscillator for main system clock oscillation • Crystal oscillator for subsystem clock oscillation Standby function STOP/HALT mode Operating ambient temperature TA = –40 to +85 ˚C Power supply voltage VDD = 1.8 to 5.5 V Package • 42-pin plastic shrink DIP (600 mil, 1.778-mm pitch) • 42-pin plastic shrink SOP (375 mil, 0.8-mm pitch) |
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