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AN4488 Fiches technique(PDF) 13 Page - STMicroelectronics |
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AN4488 Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 44 page ![]() DocID026304 Rev 3 13/44 AN4488 Power supplies 43 Figure 6. PDR_ON timings example (not to scale, not needed for STM32F411xx and STM32F446xx) Selection of PDR_ON voltage supervisor Voltage supervisor should have the following characteristics • Reset output active-high push-pull (output driving high when voltage is below trip point) • Supervisor trip point including tolerances and hysteresis should fit the expected VDD range. Notice that supervisor spec usually specify trip point for falling supply, so hysteresis should be added to check the power on phase. Example: – Voltage regulator 1.8V +/- 5% mean VDD min1.71V – Supervisor specified at 1.66V +/- 2.5% with an hysteresis of 0.5% mean - rising trip max = 1.71V (1.66V + 2.5% + 0.5%) - falling trip min = 1.62V (1.66V - 2.5%). |
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