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AN3089 Fiches technique(PDF) 14 Page - STMicroelectronics

No de pièce AN3089
Description  This application note describes the characteristics
PDF  25 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3089 Fiches technique(HTML) 14 Page - STMicroelectronics

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AN3089
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DocID16493 Rev 2
comparator activates a current source that restarts charging the soft-start capacitor from the
initial 2 V level. If the voltage on this pin reaches 5 V, the L6566B stops the operation and it
restarts with a startup sequence when the Vcc voltage drops below the VCCrestart level (5 V),
entering into the so-called “hiccup mode”.
In Figure 12 we can see that, in this case, the IC supply voltage drops to the UVLO
threshold (10 V), causing controller turn-off before the SS pin signal achieves the disable
threshold (5 V). This happens because the transformer leakage inductance is very low and
once the output voltage drops, the auxiliary voltage also immediately drops. Furthermore, in
the image we can note that during the SS voltage ramping-up the transferred power is
limited.
3.3
Overvoltage and open loop protection
The L6566B OVP function monitors the voltage on the ZCD pin (#11) during the MOSFET’s
OFF-time, when the voltage generated by the auxiliary winding tracks the converter’s output
voltage. If the voltage on the pin exceeds an internal 5 V reference, an overvoltage condition
is assumed and the device is shut down. An internal current generator is activated which
sources 1 mA out of the VFF pin (#15). If the VFF voltage is allowed to reach 2 VBE over
5 V, the L6566B is latched off (Figure 14). As soon as the IC is latched, Vcc starts
decreasing until it reaches a value 0.5 V below the turn-on threshold. Then the HV startup
circuit turns on and begins to operate periodically in order to keep Vcc between VCCON and
VCCON-0.5V (Figure 15), maintaining the IC latched.
Additionally, to improve immunity against temporary disturbances (needed for example in
case of immunity tests), an internal logic activates the protection after the OVP has been
detected for 4 consecutive switching cycles.
Figure 12. Short-circuit at full
load and 230 Vac – 50 Hz
Figure 13. Short-circuit detail at full
load and 230 Vac – 50 Hz
CH1: gate voltage
CH2: Vcc
CH1: drain voltage
CH2: Vcc
CH3: SS pin voltage
CH4: output current
CH3: SS pin voltage
CH4: output current



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