AN1318 - APPLICATION NOTE

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- The DC levels at the LVDS input B are located within the LVDS input common mode range

The LVDS input swing decreases depending on R2 and R3

6. INTERFACING LVDS TO LVPECL.

Direct interface is possible because of the common mode range of the LVPECL line receiver that is wide

enough to process LVDS signals. The differential input voltage range of the LVPECL line receivers are

specified wide enough to process LVDS signals.

Figure 6: LVDS to LVPECL Interfacing Diagram

7. INTERFACING PECL TO LVDS.

Figure 7: Interfacing PECL to LVDS in the Thevenin Equation

PointA

R1

() R1 R2 R3

++

()

⁄

2V

() VCC

()

⁄

=

PointB

R3

() R1 R2 R3

++

()

⁄

VIL

() VCC

()

⁄

=

pointA

Vswing

in pointB

R3

() R2 R3

+

()∗

⁄

=

Vswing in

Vih

2.0V

<

and

Vil

0V

>

3.3V

3.3V

LVDS

LVPECL

Z = 50

Ω

Z = 50

Ω

R 100

Ω

VCC = 5V

3.3V

R1

R1

R2

R2

R3

R3

PECL

LVDS

Z

Z

A

A

B

B

VCC = 5V