µPC8103T, µPC8108T

2

INTERNAL BOLOCK DIAGRAM (IN COMMON)

BIAS

4

5

6

3

2

1

SYSTEM APPLICATION EXAMPLE AS PAGER

PC8102T

µ

BPF

PC8103T

µ

BPF

IF

150 MHz to 330 MHz

Low noise

transistor

BPF

PC8108T

µ

BPF

IF

450 MHz to 930 MHz

This system application example schematically presents the chip set product line-up only, and does not

imply a detail application circuit (In the case of application circuit example for

µPC8103T and µPC8108T, please

refer to page 21).

For details on the related devices, refer to the latest data sheet of each device.

Note

Resonator must be externally

equipped with 3 and 4 pins.

(Refer to pin explanations)