R5F6457GLFD datasheet(96/135 Pages) RENESAS

96 / 135 page

R01DS0076EJ0120 Rev.1.20

Page 96 of 129

Aug 07, 2013

R32C/157 Group

5. Electrical Characteristics

Note:

The device is operationally guaranteed under these operating conditions.

Figure 5.1

Clock Cycle Time

Table 5.5

Operating Conditions (4/6)

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) (1)

Symbol

Characteristic

Value

Unit

Min.

Typ.

Max.

f(XIN)

Main clock oscillator frequency

MHz

f(XRef)

Reference clock frequency

MHz

f(PLL)

PLL clock oscillator frequency

144

MHz

f(Base)

Base clock frequency

MHz

tc(Base)

Base clock cycle time

15.625

f(CPU)

CPU operating frequency

MHz

tc(CPU)

CPU clock cycle time

15.625

f(BCLK)

Peripheral bus clock operating frequency

MHz

tc(BCLK)

Peripheral bus clock cycle time

31.25

f(PER)

Peripheral clock source frequency

MHz

f(XCIN)

Sub clock oscillator frequency

32.768

kHz

Base clock

(internal signal)

t c(Base)

Peripheral bus clock

(internal signal)

t c(BCLK)

CPU clock

(internal signal)

t c(CPU)

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