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R5F64562JFD Fiches technique(PDF) 96 Page - Renesas Technology Corp

No de pièce R5F64562JFD
Description  RENESAS MCU
PDF  121 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F64562JFD Fiches technique(HTML) 96 Page - Renesas Technology Corp

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R01DS0075EJ0120 Rev.1.20
Page 96 of 115
Aug 07, 2013
R32C/156 Group
5. Electrical Characteristics
VCC =5V
Timing Requirements (VCC = 4.2 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Table 5.22
Timer A Input (counting input in event counter mode)
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(TA)
TAiIN input clock cycle time
200
ns
tw(TAH)
TAiIN input high level pulse width
80
ns
tw(TAL)
TAiIN input low level pulse width
80
ns
Table 5.23
Timer A Input (gating input in timer mode)
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(TA)
TAiIN input clock cycle time
400
ns
tw(TAH)
TAiIN input high level pulse width
180
ns
tw(TAL)
TAiIN input low level pulse width
180
ns
Table 5.24
Timer A Input (external trigger input in one-shot timer mode)
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(TA)
TAiIN input clock cycle time
200
ns
tw(TAH)
TAiIN input high level pulse width
80
ns
tw(TAL)
TAiIN input low level pulse width
80
ns
Table 5.25
Timer A Input (external trigger input in pulse-width modulation mode)
Symbol
Characteristic
Value
Unit
Min.
Max.
tw(TAH)
TAiIN input high level pulse width
80
ns
tw(TAL)
TAiIN input low level pulse width
80
ns
Table 5.26
Timer A Input (increment/decrement switching input in event counter mode)
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(UP)
TAiOUT input clock cycle time
2000
ns
tw(UPH)
TAiOUT input high level pulse width
1000
ns
tw(UPL)
TAiOUT input low level pulse width
1000
ns
tsu(UP-TIN)
TAiOUT input setup time
400
ns
th(TIN-UP)
TAiOUT input hold time
400
ns



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