HIP9020AP datasheet(2/4 Pages) INTERSIL

No de pièce	HIP9020AP

Description	Programmable Quad Buffer with Pre and Post Scaler Dividers

PDF	4 Pages

Scroll/Zoom	100%

Fabricant	INTERSIL [Intersil Corporation]

Site Internet	http://www.intersil.com/cda/home

Logo

2 / 4 page

10-55

Programmable Quad Buffer Functional Block Diagram

LOGIC SELECT FOR INPUT (SSI) TO OUTPUT (VOX) DIV-BY NUMBER

PRSS-A

PRSS-B

PRSS-C

VO1, VO2, VO3

(POSS HIGH)

DIV-BY

VO4

(POSS HIGH)

DIV-BY

VO1, VO2

(POSS LOW)

DIV-BY

VO3, VO4

(POSS LOW)

DIV-BY

2121

001

010

011

100

DRIVER

(V, I PROT)

LIMITER

SQ. AMP

WITHHYS.

FREQ

DOUBLER

BUFFER

DIV BY 2

VOLT. REG. &

PRESCALER

DIV-BY

1 AND 6 - 11

PRSO

VO1

VO2

VO3

VO4

(POST SCALER SELECT)

VCC

GND

SSI

(BUFFER OUTPUT)

POSI

(PRESCALER SELECT)

DRIVER

(V, IPROT)

DRIVER

(V, IPROT)

DRIVER

(V, IPROT)

(SPEED SENSOR INPUT)

(POST SCALER INPUT)

CURRENT

SOURCE

POSS

PRSS

(PRESCALER OUTPUT)

OUTPUTS

ABC

EACH OUTPUT

PROTECTED BY A

Ω

COLLECTOR-TO-BASE

30V

ZENER DIODE CLAMP

CIRCLED NUMBERS ARE 20 LEAD SOP PACKAGE

VOX

BUF

HIP9020

HIP9020AP Fiches technique(PDF) 2 Page - Intersil Corporation

HIP9020AP Fiches technique(HTML) 2 Page - Intersil Corporation

Html Pages

1 2 3 4

Fiches technique Télécharger

Lien URL