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UPC1862GS Fiches technique(PDF) 1 Page - NEC |
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UPC1862GS Fiches technique(HTML) 1 Page - NEC |
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1 / 32 page ![]() The µPC1862 is an LSI incorporating a PLL circuit to generate nfSC clocks (fSC: color subcarrier frequency), ideal for the processing of digital video signals as in extended definition television (EDTV) systems. FEATURES • VCO is incorporated. • Horizontal and vertical sync separation circuits are incorporated (with output pins). • Horizontal and vertical sync output pulses (TTL level) • ACC amplifier and killer detector circuits are incorporated. • 1/4 and 1/8 (1/2 × 1/4) frequency dividers are incorporated. •fSC phase control circuits is incorporated. • Applicable to both NTSC and PAL systems. • Possible to input burst gate pulse from external ORDERING INFORMATION Part number Package µPC1862GS 36-pin plastic shrink SOP (300 mil) µPC1862 BIPOLAR ANALOG INTEGRATED CIRCUIT BURST LOCK CLOCK GENERATOR The information in this document is subject to change without notice. The mark shows major revised points. © 1991, 1996 DATA SHEET Document No. S11431EJ3V0DS00 (3rd edition) Date Published December 1997 N CP(K) Printed in Japan |
Numéro de pièce similaire - UPC1862GS |
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