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CS80C88 Fiches technique(PDF) 18 Page - Intersil Corporation

No de pièce CS80C88
Description  CMOS 8/16-Bit Microprocessor
PDF  32 Pages
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CS80C88 Fiches technique(HTML) 18 Page - Intersil Corporation

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FIGURE 22. BUS TIMING - MINIMUM MODE SYSTEM
NOTES:
9. RDY is sampled near the end of T2, T3, TW to determine if TW machine states are to be inserted.
10. Signals at 82C84A are shown for reference only.
TCVCTX
(31)
(29) TCVCTV
DEN
DT/R
(30)
TCHCTV
TCLRL
(33)
(30)
TCHCTV
READ CYCLE
(35)
(34) TCLRH
RD
DATA IN
(7)
TCLDX1
(10)
TRYHCH
AD7-AD0
(24)
(17)
TCLAV
READY (80C88 INPUT)
RDY (82C84A INPUT)
SEE NOTE 9, 10
ALE
A19/S6-A16/S3
(17)
TCLAV
IO/M, SSO
(30) TCHCTV
CLK (82C84A OUTPUT)
(3)
TCHCL
TCH1CH2
(4)
(2)
TCLCH
TCHCTV
(30)
(5)
TCL2CL1
T1
T2
T3
TW
T4
(WR, INTA = VOH)
(1)
TCLCL
(26) TCLDV
(18) TCLAX
A19-A16
(23) TCLLH
TLHLL
(22)
TLLAX
(25)
TCHLL
TAVAL
(39)
VIL
VIH
(12)
TRYLCL
(11)
TCHRYX
(19)
TCLAZ
(16)
TDVCL
AD7-AD0
TRHAV
(32) TAZRL
TRLRH
(37)
TCLR1X (9)
TR1VCL (8)
S6-S3
(17)
TCLAV
A15-A8
A15-A8 (FLOAT DURING INTA)
80C88



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