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74HC03DB Fiches technique(PDF) 3 Page - NXP Semiconductors |
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74HC03DB Fiches technique(HTML) 3 Page - NXP Semiconductors |
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3 / 8 page ![]() December 1990 3 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 4, 9, 12 1A to 4A data inputs 2, 5, 10, 13 1B to 4B data inputs 3, 6, 8, 11 1Y to 4Y data outputs 7 GND ground (0 V) 14 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. Fig.4 Functional diagram. Fig.5 Logic diagram (one gate). FUNCTION TABLE Note 1. H = HIGH voltage level L = LOW voltage level Z = high impedance OFF-state INPUTS OUTPUT nA nB nY L L H H L H L H Z Z Z L |
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