ATAM894_14 datasheet(41/97 Pages) ATMEL

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4679D–4BMCU–05/05

ATAM894

Timer 2 Output Mode 2

Duty Cycle Burst Generator 1:

The DCG output signal (DCGO) is given to the output, and

gated by the output flip-flop (M2)

Figure 6-18.

Carrier Frequency Burst Modulation with Timer 2 Toggle Flip-flop Output

Timer 2 Output Mode 3

Duty Cycle Burst Generator 2:

The DCG output signal (DCGO) is given to the output, and

gated by the SSI internal data output (SO)

Figure 6-19.

Carrier Frequency Burst Modulation with the SSI Data Output

Timer 2 Output Mode 4

Bi-phase Modulator:

Timer 2 Modulates the SSI Internal Data Output (SO) to Bi-phase Code.

Figure 6-20.

Bi-phase Modulation

1 2 0 1 2 0 1 2 3 4 5 01 20 1 2 3 4 5 6 78 01 2 3 4 5 67 8 9 10 01 2 3 4 5

DCGO

Counter 2

TOG2

T2O

Counter = compare register (= 2)

1 20 1 2 0 1 20 12 0 1 2 0 12 012 01 2 0 1 2 01 20 1 2 0 1 2 0 12 0 1

DCGO

Counter 2

TOG2

T2O

Counter = compare register (= 2)

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

Bit 12

Bit 13

TOG2

T2O

8-bit SR data

Bit 7

Bit 0

Data: 00110101

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