PM8803TR datasheet(21/34 Pages) STMICROELECTRONICS

21 / 34 page

PM8803

PD interface

Doc ID 018559 Rev 2

21/34

4.4

Undervoltage lockout

After classification is completed, the PSE raises the voltage to provide the Power Devices

with the negotiated power. During the transition from low to operating voltage, the internal

UVLO is released and the hot-swap MOSFET is activated, initiating the inrush sequence.

The PM8803 implements the UVLO mechanism by setting 2 internal thresholds on the

voltage across the VDD-VSS pins; one is to activate the hot-swap (VUVLO_R), while the other

is to switch off the hot-swap MOSFET upon detection of a supply voltage drop (VUVLO_F)

from normal operating conditions.

No additional external components are required to comply with the IEEE requirements. The

thermal protection alarm overrides the gate driving of the MOS, immediately switching off

the MOS itself in case of device overheating. The hot-swap is bypassed also in auxiliary

source topology, supplying directly the PWM section of the PM8803 and bypassing the hot-

swap MOSFET.

4.5

Inrush and DC current limiting

Once the detection and classification phases have been successfully completed, the PSE

raises the voltage across the Ethernet cable. When the voltage difference between VIN and

VSS is greater than the VUVLO_R threshold, the internal hot-swap MOSFET is switched on

and the DC/DC input capacitance is charged in a controlled manner.

During the inrush phase, the current is limited to 140 mA.

When the RTN voltage falls below 1.5 V, an internal signal (PGOOD in

Figure 3) is asserted

to activate the DC/DC section.

Figure 9.

Line transient response

Ch1: RTN - VSS, Ch2: VDD - VSS, Ch3: Iinput, Ch4: 5Vout (with offset)

AM045099v1

PM8803TR Fiches technique(PDF) 21 Page - STMicroelectronics