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STM8AF52AATAY Fiches technique(PDF) 77 Page - STMicroelectronics |
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STM8AF52AATAY Fiches technique(HTML) 77 Page - STMicroelectronics |
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77 / 114 page ![]() DocID14395 Rev 10 77/114 STM8AF52/62xx, STM8AF51/61xx Electrical characteristics 113 10.3.7 Reset pin characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. Figure 36. Typical NRST VIL and VIH vs VDD @ four temperatures Table 41. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST) NRST low-level input voltage(1) 1. Data based on characterization results, not tested in production. —VSS — 0.3 x VDD — VIH(NRST) NRST high-level input voltage(1) — 0.7 x VDD —VDD VOL(NRST) NRST low-level output voltage(1) IOL = 3 mA — 0.6 V RPU(NRST) NRST pull-up resistor — 30 40 60 k Ω tIFP NRST input filtered pulse(1) — 85 — 315 ns tINFP(NRST) NRST Input not filtered pulse duration(2) 2. Data guaranteed by design, not tested in production. 500 ns |
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