CS4216 datasheet(21/58 Pages) CIRRUS

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SCLK to CLKIN, the noise performance in

Slave sub-mode may be slightly worse than

when using Master sub-mode. The CS4216 inter-

nally sets the sample frequency by sensing the

ratio of SCLK to CLKIN; therefore, for a given

CLKIN frequency, the sample frequency is se-

lected by changing the SCLK frequency.

SM4-Slave allows up to four codecs to occupy

the same audio serial port. Table 8 lists the pin

configurations required to set the serial audio

port up for 32, 64, or 128 bits-per-frame (BPF).

Since each codec requires one sub-frame of

32 bits, 64 bits-per-frame allows up to two

codecs to occupy the same audio serial port, and

128 bits-per-frame allows up to four codecs to

occupy the same audio serial port. When set up

for more than one codec on the bus, other pins

are needed to select the particular time slot (TS)

associated with each codec. MF8:SFS2 selects

the time slot when in 64 BPF mode, and

MF8:SFS2 and MF7:SFS1 select one of four

time slots when in 128 bits-per-frame mode. Ta-

ble 8 lists the decoding for time slot selection.

In SM4-Slave, the frequency of the incoming

SCLK signal, in relation to CLKIN, determines

the sample frequency on the CS4216. The

CS4216 determines the ratio of SCLK to CLKIN

and sets the internal sample frequency accord-

ingly. Table 9 lists the SCLK to CLKIN fre-

quency ratio used to determine the codec’s

sample frequency. SCLK must equal CLKIN di-

vided by the number in the table, based on the

selected bits per frame. As an example, assuming

32 BPF and CLKIN = 11.2896 MHz, if a sample

frequency of 11.025 kHz is desired, SCLK must

equal CLKIN divided by 32 or 352.8 kHz.

Serial Control Port (SM4)

Serial Mode 4 separates the audio data from the

control data. Since control data such as gain and

attenuation do not change often, this mode re-

duces the bandwidth needed to support the audio

serial port.

The control information is entered through a

separate port that can be asynchronous to the

audio port and only needs to be updated when

changes in the control data are needed. After a

reset or power down, the control port must be

written once to initialize it if the port will be ac-

cessed to read or write control bits. This initial

write is considered a "dummy" write since the

data is ignored by the codec. A second write is

needed to configure the codec as desired. Then,

the control port only needs to be written to when

a change is desired, or to obtain the status infor-

mation. The control port does not function if the

master clock is not operating. When the control

Fs (kHz)

MF6:

MF7:

MF8:

with CLKIN

12.288

11.2896

MHz

256

48.00

44.10

384

32.00

29.40

512

24.00

22.05

640

19.20

17.64

768

16.00

14.70

1024

12.00

11.025

1280

9.60

8.82

1536

8.00

7.35

Table 7. SM4-Master, Fs Select

MF6:

MF7:

MF8:

Bits Per

Time

SFS1

SFS2

Frame

Slot

(BPF)

(TS)

000

001

Reserved

010

011

100

128

110

128

101

128

111

128

Table 8. SM4-Slave, Audio Port BPF & TS Select

CS4216

DS83F2

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