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SCF5250LPV100 Fiches technique(PDF) 15 Page - Freescale Semiconductor, Inc |
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SCF5250LPV100 Fiches technique(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 56 page ![]() SCF5250 Data Sheet: Technical Data, Rev. 1.3 Freescale Semiconductor 15 3.8 Serial Module Signals The signals described in Table 5 transfer serial data between the two UART modules and the external peripherals. 3.9 Timer Module Signals Table 6 describes the Timer module signal which provides an external interface to Timer0. Table 5. Serial Module Signals Serial Module Signal Description Receive Data The RXD0/GPIO46 and SDA1/RXD1/GPIO44 are the inputs on which serial data is received by the DUART. Data is sampled on RxD[1:0] on the rising edge of the serial clock source, with the least significant bit received first. Transmit Data The DUART transmits serial data on the TXD0/GPIO45 and SCL1/TXD1/GPIO10 output signals. Data is transmitted on the falling edge of the serial clock source, with the least significant bit transmitted (LSB) first. When no data is being transmitted or the transmitter is disabled, these two signals are held high. TxD[1:0] are also held high in local loopback mode. Request To Send The DDATA3/RTS0/GP104 and DDATA1/RTS1/SDATA2_BS2/GPIO2 request-to-send outputs indicate to the peripheral device that the DUART is ready to send data and requires a clear-to-send signal to initiate transfer. Clear To Send Peripherals drive the DDATA2/CTS0/GPIO3 and DDATA0/CTS1/SDATA0_SDIO1/GPIO1 inputs to indicate to the SCF5250 serial module that it can begin data transmission. Table 6. Timer Module Signals Serial Module Signal Description Timer Output The SDATAO1/TOUT0/GPIO18 programmable output pulse or toggle on various timer events. |
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