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DSPIC33FJ64GP706 Fiches technique(PDF) 97 Page - Microchip Technology |
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DSPIC33FJ64GP706 Fiches technique(HTML) 97 Page - Microchip Technology |
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97 / 322 page ![]() © 2009 Microchip Technology Inc. DS70286C-page 95 dsPIC33FJXXXGPX06/X08/X10 bit 2 C1RXIF: ECAN1 Receive Data Ready Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred bit 1 SPI2IF: SPI2 Event Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred bit 0 SPI2EIF: SPI2 Error Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred REGISTER 7-7: IFS2: INTERRUPT FLAG STATUS REGISTER 2 (CONTINUED) |
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