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API840N Fiches technique(PDF) 4 Page - Aplus Intergrated Circuits |
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API840N Fiches technique(HTML) 4 Page - Aplus Intergrated Circuits |
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4 / 10 page ![]() 4 PIN DESCRIPTIONS Name I/O Function TG8 I Trigger Switch 8, Internal Pull LOW, Active HIGH O Drives First LED Flash at 3 Hz, Active LOW VOUT1 O PWM Audio Signal Output for Buzzer VOUT2 O Compliment PWM Audio Signal Output for Buzzer GND - Power Ground STP/BUSY O Generate 30 ms Pulse or Busy Signal After Voice Playback O Drives Second LED Flash at 3 Hz, Active LOW COUT O Current Output from Internal DAC for Speaker Playback OSC I Oscillator Resistor Pin to Control Sampling Frequency TG5 I Trigger Switch 5, Internal Pull LOW, Active HIGH TG6 I Trigger Switch 6, Internal Pull LOW, Active HIGH VPP - Program Power Supply, No Connect When Voice Playback TG1 I Trigger Switch 1, Internal Pull LOW, Active HIGH TG2 I Trigger Switch 2, Internal Pull LOW, Active HIGH VCC - Positive Power Supply TG3 I Trigger Switch 3, Internal Pull LOW, Active HIGH TG4 I Trigger Switch 4, Internal Pull LOW, Active HIGH SBT I One Key or Sequential Trigger, Internal Pull LOW, Active HIGH IRP I Interrupt to Stop Playback, Internal Pull LOW, Active HIGH TG7 I Trigger Switch 7, Internal Pull LOW, Active HIGH Note: 1. The following pins are used to program data into the memory on the chip: pins 5, 6, 7, 9, 12, 15, 18 and 19. PIN CONFIGURATION 20-Pin 300-mil PDIP 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 TG8 LED1 VOUT1 VOUT2 GND STP LED2 COUT OSC TG5 TG7 IRP SBT TG4 TG3 VCC TG2 TG1 VPP TG6 APLUS API840N LED 1 LED 2 |
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