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STM32L151VD Fiches technique(PDF) 116 Page - STMicroelectronics |
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STM32L151VD Fiches technique(HTML) 116 Page - STMicroelectronics |
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116 / 140 page ![]() Electrical characteristics STM32L151xD STM32L152xD 116/140 Doc ID 022027 Rev 6 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 38 or Figure 39, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 38. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. Figure 39. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. VREF+ (see note 1) STM32L15xxx VDDA VSSA /VREF– (see note 1) 1 μF // 100 nF 1 μF // 100 nF ai17857b VREF+/VDDA STM32L15xxx 1 μF // 100 nF VREF–/VSSA ai17858a (See note 1) (See note 1) |
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