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STM8S005C6T6 Fiches technique(PDF) 72 Page - STMicroelectronics |
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STM8S005C6T6 Fiches technique(HTML) 72 Page - STMicroelectronics |
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72 / 103 page ![]() I/O port pin characteristics 9.3.6 General characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Table 36: I/O static characteristics Unit Max Typ Min Conditions Parameter Symbol V 0.3 x VDD -0.3 VDD = 5 V Input low level voltage VIL V VDD + 0.3 V 0.7 x VDD Input high level voltage VIH mV 700 Hysteresis (1) Vhys kΩ 80 55 30 VDD = 5 V, VIN = VSS Pull-up resistor Rpu ns 35 (3) Fast I/Os load = 50 pF Rise and fall time(10 % - 90 %) tR, tF ns 125 (3) Standard and high sink I/OsLoad = 50 pF µA ±1.0 (2) VSS ≤ VIN ≤ VDD Input leakage current, analog and digital Ilkg nA ±250 (2) VSS ≤ VIN ≤ VDD Analog input leakage current Ilkg ana µA ±1.0 (2) Injection current ±4 mA Leakage current in adjacent I/O (2) Ilkg(inj) (1) Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production. (2) Data based on characterization results, not tested in production. (3)Data guaranteed by design, not tested in production. DocID022186 Rev 3 72/103 STM8S005K6 STM8S005C6 Electrical characteristics |
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