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EDF1AS Fiches technique(PDF) 3 Page - Vishay Siliconix |
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EDF1AS Fiches technique(HTML) 3 Page - Vishay Siliconix |
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3 / 4 page ![]() EDF1AS, EDF1BS, EDF1CS, EDF1DS www.vishay.com Vishay General Semiconductor Revision: 19-Aug-13 3 Document Number: 88578 For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Fig. 5 - Typical Junction Capacitance Per Diode PACKAGE OUTLINE DIMENSIONS in inches (millimeters) 1 0.1 10 100 1000 10 5 0 15 20 25 30 Reverse Voltage (V) T J = 25 °C f = 1.0 MHz V sig = 50 mVp-p Mounting Pad La yout 0.255 (6.5) 0.245 (6.2) 0.013 (0.330) 0.009 (0.241) 0.060 (1.524) 0.040 (1.016) 0.404 (10.3) 0.013 (0.330) 0.003 (0.076) 0.047 (1.20) 0.040 (1.02) 0.205 (5.2) 0.195 (5.0) 0.335 (8.51) 0.320 (8.13) 0.130 (3.3) 0.120 (3.05) 45° 0.386 (9.80) Case Style DFS 0.404 MAX. (10.26 MAX.) 0.205 (5.2) 0.195 (5.0) 0.047 MIN. (1.20 MIN.) 0.060 MIN. (1.52 MIN.) |
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