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INA226AIDGST Fiches technique(PDF) 25 Page - Texas Instruments

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No de pièce INA226AIDGST
Description  High-or Low-Side Measurement, Bi-Directional CURRENT/POWER MONITOR with I2C Interface
PDF  33 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

INA226AIDGST Fiches technique(HTML) 25 Page - Texas Instruments

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Frame 1 SMBus ALERT Response Address Byte
Frame 2 Slave Address Byte
(1)
Start By
Master
ACK By
INA226
From
INA226
NACK By
Master
Stop By
Master
1
9
1
9
SDA
SCL
ALERT
0
0
0
1
1
0
0
R/W
1
0
0
A3
A2
A1
A0
0
Frame 1 Two-Wire Slave Address Byte
(1)
Frame 2 Register Pointer Byte
1
Start By
Master
ACK By
INA226
ACK By
INA226
1
9
1
9
SDA
SCL
0
0
A3
A2
A1
A0
R/W
P7
P6
P5
P4
P3
P2
P1
P0
Stop
¼
INA226
www.ti.com
SBOS547
– JUNE 2011
Figure 26 shows the timing diagram for the SMBus Alert response operation. Figure 27 illustrates a typical
register pointer configuration.
(1)
The value of the Slave Address Byte is determined by the settings of the A0 and A1 pins. Refer to Table 7.
Figure 26. Timing Diagram for SMBus ALERT
(1)
The value of the Slave Address Byte is determined by the settings of the A0 and A1 pins. Refer to Table 7.
Figure 27. Typical Register Pointer Set
Copyright
© 2011, Texas Instruments Incorporated
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