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LT1818 Fiches technique(PDF) 18 Page - Linear Technology

No de pièce LT1818
Description  Gain-Bandwidth Product: 325MHz
PDF  28 Pages
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Fabricant  LINER [Linear Technology]
Site Internet  http://www.linear.com
Logo LINER - Linear Technology

LT1818 Fiches technique(HTML) 18 Page - Linear Technology

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LT1806/LT1807
18
18067fc
or 8-lead MSOP package. All packages have the V sup-
ply pin fused to the lead frame to enhance the thermal
conductance when connecting to a ground plane or a
large metal trace. Metal trace and plated through-holes
can be used to spread the heat generated by the device
to the backside of the PC board. For example, on a 3/32"
FR-4 board with 2oz copper, a total of 660 square mil-
limeters connects to Pin 4 of LT1807 in an SO-8 package
(330 square millimeters on each side of the PC board) will
bring the thermal resistance,
θJA,toabout85°C/W.Without
extra metal trace beside the power line connecting to the
V pin to provide a heat sink, the thermal resistance will be
around 105°C/W. More information on thermal resistance
for all packages with various metal areas connecting to
the V pin is provided in Tables 1, 2 and 3.
Table 1. LT1806 6-Lead SOT-23 Package
COPPER AREA
BOARD AREA
(mm2)
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE (mm2)
270
2500
135°C/W
100
2500
145°C/W
20
2500
160°C/W
0
2500
200°C/W
Device is mounted on topside.
Table 2. LT1806/LT1807 SO-8 Package
COPPER AREA
BOARD AREA
(mm2)
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE
(mm2)
BACKSIDE
(mm2)
1100
1100
2500
65°C/W
330
330
2500
85°C/W
35
35
2500
95°C/W
35
0
2500
100°C/W
0
0
2500
105°C/W
Device is mounted on topside.
APPLICATIONS INFORMATION
Table 3. LT1807 8-Lead MSOP Package
COPPER AREA
BOARD AREA
(mm2)
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE
(mm2)
BACKSIDE
(mm2)
540
540
2500
110°C/W
100
100
2500
120°C/W
100
0
2500
130°C/W
30
0
2500
135°C/W
0
0
2500
140°C/W
Device is mounted on topside.
Junction temperature TJ is calculated from the ambient
temperature TA and power dissipation PD as follows:
TJ = TA + (PD • θJA)
The power dissipation in the IC is the function of the supply
voltage, output voltage and the load resistance. For a given
supply voltage, the worst-case power dissipation PD(MAX)
occurs at the maximum quiescent supply current and at
the output voltage which is half of either supply voltage
(or the maximum swing if it is less than 1/2 the supply
voltage). PD(MAX) is given by:
PD(MAX) = (VS • IS(MAX)) + (VS/2)2/RL
Example: An LT1807 in SO-8 mounted on a 2500mm2
area of PC board without any extra heat spreading plane
connected to its V pin has a thermal resistance of
105°C/W,
θJA. Operating on ±5V supplies with both ampli-
fiers simultaneously driving 50Ω loads, the worst-case
power dissipation is given by:
PD(MAX) = 2 • (10 • 14mA) + 2 • (2.5)2/50
= 0.28 + 0.25 = 0.53W



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