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LNBH26 Fiches technique(PDF) 22 Page - STMicroelectronics

No de pièce LNBH26
Description  Dual LNBS supply and control IC with step-up and I짼C interface
PDF  38 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26 Fiches technique(HTML) 22 Page - STMicroelectronics

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I²C interface protocol
LNBH26
22/38
Doc ID 022771 Rev 1
7.3
Data registers
The DATA 1..4 registers can be addressed both in write and read mode. In read mode they
return the last writing byte status received in the previous write transmission.
The following tables provide the register address values of Data 1..4 and a function
description of each bit.
N/A = Reserved bit.
All bits reset to “0” at power-on.
Table 7.
DATA 1 (Read/Write register. Register address = 0X2)
Bit
Name
CH
Value
Description
Bit 0
(LSB)
VSEL1-A
A
0/1
Channel A
Output voltage selection bits.
(Refer to
Table 14)
Bit 1
VSEL2-A
0/1
Bit 2
VSEL3-A
0/1
Bit 3
VSEL4-A
0/1
Bit 4
VSEL1-B
B
0/1
Channel B
Output voltage selection bits.
(Refer to
Table 14)
Bit 5
VSEL2-B
0/1
Bit 6
VSEL3-B
0/1
Bit 7
(MSB)
VSEL4-B
0/1



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