ADP7105ACPZ-R2 datasheet(23/28 Pages) AD

No de pièce	ADP7105ACPZ-R2

Description	20 V, 500 mA, Low Noise LDO Regulator with Soft Start

PDF	28 Pages

Scroll/Zoom	100%

Fabricant	AD [Analog Devices]

Site Internet	http://www.analog.com

Logo

23 / 28 page

Data Sheet

ADP7105

Rev. 0 | Page 23 of 28

In the case where the board temperature is known, use the ΨJB

thermal characterization parameter to estimate the junction

temperature rise (see Figure 77 and Figure 78). Maximum

junction temperature (TJ) is calculated from the board tempera-

ture (TB) and power dissipation (PD) using the following

formula:

TJ = TB + (PD × ΨJB)

(5)

The typical value of ΨJB is 15.1°C/W for the 8-lead LFCSP package

and 31.3°C/W for the 8-lead SOIC package (see Table 7).

Figure 77. LFCSP

Figure 78. SOIC

TOTAL POWER DISSIPATION (W)

100

120

140

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0

TB = 25°C

TB = 50°C

TB = 65°C

TB = 85°C

TJ MAX

TOTAL POWER DISSIPATION (W)

100

120

140

0.5

1.0

1.5

2.0

2.5

3.0

3.5

TB = 25°C

TB = 50°C

TB = 65°C

TB = 85°C

TJ MAX

ADP7105ACPZ-R2 Fiches technique(PDF) 23 Page - Analog Devices

ADP7105ACPZ-R2 Fiches technique(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Fiches technique Télécharger

Lien URL