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82563EB Fiches technique(PDF) 13 Page - Intel Corporation

No de pièce 82563EB
Description  82563EB/82564EB Gigabit Platform LAN Connect
PDF  52 Pages
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Fabricant  INTEL [Intel Corporation]
Site Internet  http://www.intel.com
Logo INTEL - Intel Corporation

82563EB Fiches technique(HTML) 13 Page - Intel Corporation

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82563EB/82564EB Gigabit Platform LAN Connect Networking Silicon
7
3.4
Port A PHY Interface
Note:
Port A on the 82563EB/82564EB corresponds to connection to Port 0 on the 631xESB/632xESB.
Table 3.
Port A PHY Interface Pins
Signal Name
Pin
Type
Sub-
Type
Description
MDIA_PLUS[0]
MDIA_MINUS[0]
27
28
AA
Media Dependent Interface for Port A, bit 0
1000BASE-T:In MDI configuration, MDI[0]+/- corresponds to
BI_DA+/- and in MDIX configuration MDI[0]+/-
corresponds to BI_DB+/-.
100BASE-TX:In MDI configuration, MDI[0]+/- is used for the
transmit pair and in MDIX configuration MDI[0]+/- is
used for the receive pair.
10BASE-T:
In MDI configuration, MDI[0]+/- is used for the transmit
pair and in MDIX configuration MDI[0]+/- is used for
the receive pair.
MDIA_PLUS[1]
MDIA_MINUS[1]
31
32
AA
Media Dependent Interface for Port A, bit 1
1000BASE-T:In MDI configuration, MDI[1]+/- corresponds to
BI_DB+/- and in MDIX configuration MDI[1]+/-
corresponds to BI_DA+/-.
100BASE-TX:In MDI configuration, MDI[1]+/- is used for the receive
pair and in MDIX configuration MDI[1]+/- is used for
the transmit pair.
10BASE-T:
In MDI configuration, MDI[1]+/- is used for the receive
pair and in MDIX configuration MDI[1]+/- is used for
the transmit pair.
MDIA_PLUS[2]
MDIA_MINUS[2]
33
34
AA
Media Dependent Interface for Port A, bit 2
1000BASE-T:In MDI configuration, MDI[2]+/- corresponds to
BI_DC+/- and in MDIX configuration MDI[2]+/-
corresponds to BI_DD+/-.
100BASE-TX:Unused.
10BASE-T:
Unused.
MDIA_PLUS[3]
MDIA_MINUS[3]
36
37
AA
Media Dependent Interface for Port A, bit 3
1000BASE-T:In MDI configuration, MDI[3]+/- corresponds to
BI_DD+/- and in MDIX configuration MDI[3]+/-
corresponds to BI_DC+/-.
100BASE-TX:Unused.
10BASE-T:
Unused.
LINK_A
65
I/O
TTL8
PHY A Link Indication
This signal is registered at the rising edge of PHY_PWR_GOOD,
and is used to determine the clock speed used for PHY_CLK_OUT.
Once PHY_PWR_GOOD is 1, LINK_A will always be an output and
indicate link up.



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