STP10N65K3 datasheet(5/17 Pages) STMICROELECTRONICS

5 / 17 page

STF10N65K3, STFI10N65K3, STP10N65K3

Electrical characteristics

Doc ID 15732 Rev 3

5/17

The built-in back-to-back Zener diodes have been specifically designed to enhance not only

the device’s ESD capability, but also to make them capable of safely absorbing any voltage

transients that may occasionally be applied from gate to source. In this respect, the Zener

voltage is appropriate to achieve efficient and cost-effective protection of device integrity.

The integrated Zener diodes thus eliminate the need for external components.

Table 6.

Switching times

Symbol

Parameter

Test conditions

Min.

Typ.

Max

Unit

td(on)

td(off)

Turn-on delay time

Rise time

Turn-off-delay time

Fall time

VDD = 310 V, ID = 3.5 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 17)

14.5

Table 7.

Source drain diode

Symbol

Parameter

Test conditions

Min.

Typ.

Max. Unit

ISD

ISDM

(1)

Pulse width limited by safe operating area.

Source-drain current

Source-drain current (pulsed)

7.2

28.8

VSD

(2)

Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

Forward on voltage

ISD = 7 A, VGS = 0

1.5

trr

Qrr

IRRM

Reverse recovery time

Reverse recovery charge

Reverse recovery current

ISD = 7 A, di/dt = 100A/µs

VDD = 60 V (see Figure 22)

320

µC

trr

Qrr

IRRM

Reverse recovery time

Reverse recovery charge

Reverse recovery current

ISD = 7 A, di/dt = 100 A/µs

VDD = 60 V, Tj = 150 °C

(see Figure 22)

410

2.9

µC

Table 8.

Gate-source Zener diode

Symbol

Parameter

Test conditions

Min.

Typ.

Max. Unit

V(BR)GSO

Gate-source breakdown

voltage

Igs=± 1 mA, ID=0

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