| Moteur de recherche de fiches techniques de composants électroniques |
|
STM32L152C6 Fiches technique(PDF) 80 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32L152C6 Fiches technique(HTML) 80 Page - STMicroelectronics |
|
80 / 121 page ![]() Electrical characteristics STM32L151x6/8/B, STM32L152x6/8/B 80/121 Doc ID 17659 Rev 8 Output driving current The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with the non-standard VOL/VOH specifications given in Table 43. in the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.2: ● The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating IVDD (see Table 12). ● The sum of the currents sunk by all the I/Os on VSS plus the maximum Run consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating IVSS (see Table 12). Output voltage levels Unless otherwise specified, the parameters given in Table 43 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 14. All I/Os are CMOS and TTL compliant. 9. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order) . Table 43. Output voltage characteristics Symbol Parameter Conditions Min Max Unit VOL (1)(2) 1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 12 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. 2. Tested in production. Output low level voltage for an I/O pin when 8 pins are sunk at same time IIO = +8 mA 2.7 V < VDD < 3.6 V 0.4 V VOH (3)(2) 3. The IIO current sourced by the device must always respect the absolute maximum rating specified in Table 12 and the sum of IIO (I/O ports and control pins) must not exceed IVDD. Output high level voltage for an I/O pin when 8 pins are sourced at same time 2.4 VOL (1)(4) Output low level voltage for an I/O pin when 8 pins are sunk at same time IIO =+ 4 mA 1.65 V < VDD < 2.7 V 0.45 VOH (3)(4) Output high level voltage for an I/O pin when 8 pins are sourced at same time VDD-0.45 VOL (1)(4) 4. Based on characterization data, not tested in production. Output low level voltage for an I/O pin when 4 pins are sunk at same time IIO = +20 mA 2.7 V < VDD < 3.6 V 1.3 VOH (3)(4) Output high level voltage for an I/O pin when 4 pins are sourced at same time VDD-1.3 |
|
Lien URL |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Lien vers la fiche technique | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |